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AS3340 - Tip |
To improve stability of VCO during PWM excursion, this simple solution can be used:
Q1 : BCV62 (PNP pair)
VZ1: BZX79-C2V4
R2 : 10k
R1 : 51k
This solution prevents the voltage on internal node A from going below +Vcc-(7-8V) , minimizing voltage swing. Diode D2 remains turned OFF and prevents excess current flow through internal GND. VT2 serves as a transistor when A node is high (current mirror Q1:2; Q1:1 is OFF), and as zener (VT2: BE), when A node goes low (current mirror Q1:2; Q1:1 is ON).
This design improves the stability of VCO vs PWM several times.
Note: Signal on collector Q1:1 Pulse Output is inverted to Pin4 of the AS3340.
2020 v.1 1